PoC.io.uart.bclk

Todo

No documentation available.

old comments:

UART BAUD rate generator bclk_r = bit clock is rising bclk_x8_r = bit clock times 8 is rising

Entity Declaration:

 1  );
 2  port (
 3    clk     : in  std_logic;
 4    rst     : in  std_logic;
 5    bclk    : out std_logic;
 6    bclk_x8 : out std_logic
 7  );
 8end entity;
 9
10
11architecture rtl of uart_bclk is
12  constant UART_OVERSAMPLING_RATE           : positive          := 8;