PoC.cache.replacement_policy
Supported policies:
Abbr. |
Policies |
supported |
|---|---|---|
RR |
round robin |
not yet |
RAND |
random |
not yet |
CLOCK |
clock algorithm |
not yet |
LRU |
least recently used |
YES |
LFU |
least frequently used |
not yet |
Command thruth table:
TagAccess |
ReadWrite |
Invalidate |
Replace |
Command |
|---|---|---|---|---|
0 |
0 |
None |
||
1 |
0 |
0 |
0 |
TagHit and reading a cache line |
1 |
1 |
0 |
0 |
TagHit and writing a cache line |
1 |
0 |
1 |
0 |
TagHit and invalidate a cache line (while reading) |
1 |
1 |
1 |
0 |
TagHit and invalidate a cache line (while writing) |
0 |
0 |
1 |
Replace cache line |
In a set-associative cache, each cache-set has its own instance of this component.
The input HitWay specifies the accessed way in a fully-associative or
set-associative cache.
The output ReplaceWay identifies the way which will be replaced as next by
a replace command. In a set-associative cache, this is the way in a specific
cache set (see above).
Entity Declaration:
1 );
2 port (
3 Clock : in std_logic;
4 Reset : in std_logic;
5
6 -- replacement interface
7 Replace : in std_logic;
8 ReplaceWay : out std_logic_vector(log2ceilnz(CACHE_WAYS) - 1 downto 0);
9
10 -- cacheline usage update interface
11 TagAccess : in std_logic;
12 ReadWrite : in std_logic;
13 Invalidate : in std_logic;
14 HitWay : in std_logic_vector(log2ceilnz(CACHE_WAYS) - 1 downto 0)
15 );
16end entity;
17
18
19architecture rtl of cache_replacement_policy is
20 attribute KEEP : boolean;