PoC.comm.scramble

The LFSR computation is unrolled to generate an arbitrary number of mask bits in parallel. The mask are output in little endian. The generated bit sequence is independent from the chosen output width.

Entity Declaration:

 1    GEN  : bit_vector;       -- Generator Polynomial (little endian)
 2    BITS : positive          -- Width of Mask Bits to be computed in parallel in each step
 3  );
 4  port (
 5    clk  : in  std_logic;    -- Clock
 6
 7    set  : in  std_logic;    -- Set LFSR to value provided on din
 8    din  : in  std_logic_vector(GEN'length-2 downto 0) := (others => '0');
 9
10    step : in  std_logic;    -- Compute a Mask Output
11    mask : out std_logic_vector(BITS-1 downto 0)
12  );
13end entity comm_scramble;